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Freescale Semiconductor /MKL27Z4 /DMAMUX0 /CHCFG1

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Interpret as CHCFG1

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7 43 0 0 00 0 0 0 0 0 0 0 0 (0)SOURCE0 (0)TRIG 0 (0)ENBL

SOURCE=0, ENBL=0, TRIG=0

Description

Channel Configuration register

Fields

SOURCE

DMA Channel Source (Slot)

0 (0): Disable_Signal

2 (2): LPUART0_Rx_Signal

3 (3): LPUART0_Tx_Signal

4 (4): LPUART1_Rx_Signal

5 (5): LPUART1_Tx_Signal

6 (6): UART2_Rx_Signal

7 (7): UART2_Tx_Signal

10 (10): FlexIO_Channel0_Signal

11 (11): FlexIO_Channel1_Signal

12 (12): FlexIO_Channel2_Signal

13 (13): FlexIO_Channel3_Signal

14 (14): I2S0_Rx_Signal

15 (15): I2S0_Tx_Signal

16 (16): SPI0_Rx_Signal

17 (17): SPI0_Tx_Signal

18 (18): SPI1_Rx_Signal

19 (19): SPI1_Tx_Signal

22 (22): I2C0_Signal

23 (23): I2C1_Signal

24 (24): TPM0_Channel0_Signal

25 (25): TPM0_Channel1_Signal

26 (26): TPM0_Channel2_Signal

27 (27): TPM0_Channel3_Signal

28 (28): TPM0_Channel4_Signal

29 (29): TPM0_Channel5_Signal

32 (32): TPM1_Channel0_Signal

33 (33): TPM1_Channel1_Signal

34 (34): TPM2_Channel0_Signal

35 (35): TPM2_Channel1_Signal

40 (40): ADC0_Signal

42 (42): CMP0_Signal

45 (45): DAC0_Signal

49 (49): Port_A_Signal

51 (51): Port_C_Signal

52 (52): Port_D_Signal

54 (54): TPM0_Overflow_Signal

55 (55): TPM1_Overflow_Signal

56 (56): TPM2_Overflow_Signal

60 (60): AlwaysOn60_Signal

61 (61): AlwaysOn61_Signal

62 (62): AlwaysOn62_Signal

63 (63): AlwaysOn63_Signal
TRIG

DMA Channel Trigger Enable

0 (0): Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)

1 (1): Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.
ENBL

DMA Channel Enable

0 (0): DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel.

1 (1): DMA channel is enabled

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data